Espressif Systems /ESP32 /APB_CTRL /APB_SARADC_CTRL

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as APB_SARADC_CTRL

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (SARADC_START_FORCE)SARADC_START_FORCE 0 (SARADC_START)SARADC_START 0 (SARADC_SAR2_MUX)SARADC_SAR2_MUX 0SARADC_WORK_MODE 0 (SARADC_SAR_SEL)SARADC_SAR_SEL 0 (SARADC_SAR_CLK_GATED)SARADC_SAR_CLK_GATED 0SARADC_SAR_CLK_DIV 0SARADC_SAR1_PATT_LEN 0SARADC_SAR2_PATT_LEN 0 (SARADC_SAR1_PATT_P_CLEAR)SARADC_SAR1_PATT_P_CLEAR 0 (SARADC_SAR2_PATT_P_CLEAR)SARADC_SAR2_PATT_P_CLEAR 0 (SARADC_DATA_SAR_SEL)SARADC_DATA_SAR_SEL 0 (SARADC_DATA_TO_I2S)SARADC_DATA_TO_I2S

Fields

SARADC_START_FORCE
SARADC_START
SARADC_SAR2_MUX

1: SAR ADC2 is controlled by DIG ADC2 CTRL 0: SAR ADC2 is controlled by PWDET CTRL

SARADC_WORK_MODE

0: single mode 1: double mode 2: alternate mode

SARADC_SAR_SEL

0: SAR1 1: SAR2 only work for single SAR mode

SARADC_SAR_CLK_GATED
SARADC_SAR_CLK_DIV

SAR clock divider

SARADC_SAR1_PATT_LEN

0 ~ 15 means length 1 ~ 16

SARADC_SAR2_PATT_LEN

0 ~ 15 means length 1 ~ 16

SARADC_SAR1_PATT_P_CLEAR

clear the pointer of pattern table for DIG ADC1 CTRL

SARADC_SAR2_PATT_P_CLEAR

clear the pointer of pattern table for DIG ADC2 CTRL

SARADC_DATA_SAR_SEL

1: sar_sel will be coded by the MSB of the 16-bit output data in this case the resolution should not be larger than 11 bits.

SARADC_DATA_TO_I2S

1: I2S input data is from SAR ADC (for DMA) 0: I2S input data is from GPIO matrix

Links

() ()